69 lines
1.9 KiB
C
69 lines
1.9 KiB
C
#include "pwm.h"
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#include "inc/msp432p401r.h"
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// PWM on P2.4/.5 using TimerA0 TA0.CCR1/2
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// period is 1.333us (1.333us = 2 * 666.7ns because of up/down)
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// SMCLK = 48MHz/4 = 12 MHz, 83.33ns
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// Let Timerclock period T = 8/12MHz = 666.7ns
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// P2.4/.5 = 1 when timer equals TA0CCR1/2 on way down,
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// P2.4/.5 = 0 when timer equals TA0CCR1/2 on way up
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void PWMInitP2_4_P2_5(uint16_t period) {
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P2->DIR |= 0x30;
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P2->SEL0 |= 0x30; // Timer0A functions
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P2->SEL1 &= ~0x30;
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TIMER_A0->CCR[0] = period;
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TIMER_A0->EX0 = 0; // Divide by 1
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TIMER_A0->CCTL[1] = 0x40; // Toggle/reset
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TIMER_A0->CCTL[2] = 0x40;
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TIMER_A0->CCR[1] = 0; // Initial duty cycle to 0
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TIMER_A0->CCR[2] = 0;
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TIMER_A0->CTL = 0x2F0; // SMCLK = 12MHz, divide by 8, up-down mode
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}
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void SetPWMDutyP2_4(uint16_t duty) {
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if (duty >= TIMER_A0->CCR[0]) return;
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TIMER_A0->CCR[1] = duty;
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}
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void SetPWMDutyP2_5(uint16_t duty) {
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if (duty >= TIMER_A0->CCR[0]) return;
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TIMER_A0->CCR[2] = duty;
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}
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// PWM on P2.6/.7 using TimerA0 TA0.CCR3/4
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// SMCLK = 48MHz/4 = 12 MHz, 83.33ns
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// period is 1.333us
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// Let Timerclock period T = 8/12MHz = 666.7ns
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// P2.6/.7 = 1 when timer equals TA0CCR3/4 on way down,
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// P2.6/.7 = 0 when timer equals TA0CCR3/4 on way up
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void PWMInitMotor(uint16_t period) {
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P2->DIR |= BIT6 | BIT7;
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P2->SEL0 |= BIT6 | BIT7;
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P2->SEL1 &= ~(BIT6 | BIT7);
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TIMER_A0->CCR[0] = period;
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TIMER_A0->EX0 = 0x00;
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TIMER_A0->CCTL[3] = 0x40;
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TIMER_A0->CCTL[4] = 0x40;
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TIMER_A0->CCR[3] = 0;
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TIMER_A0->CCR[4] = 0;
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TIMER_A0->CTL = 0x02F0;
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// ZKURVENA MRDKA
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}
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// right motor on P2.6 -> CCR3
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void SetPWMDutyRightMotor(uint16_t duty) {
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if (duty >= TIMER_A0->CCR[0]) return;
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TIMER_A0->CCR[3] = duty;
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}
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// left motor on P2.7 -> CCR4
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void SetPWMDutyLeftMotor(uint16_t duty) {
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if (duty >= TIMER_A0->CCR[0]) return;
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TIMER_A0->CCR[4] = duty;
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} |