79 lines
2.8 KiB
C
79 lines
2.8 KiB
C
#include "input_capture.h"
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#include "inc/msp432p401r.h"
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void (*capture_task)(uint16_t time);
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// Initialize Timer A0 in edge time mode to request interrupts on
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// the rising edge of P7.3 (TA0CCP0). The interrupt service routine
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// acknowledges the interrupt and calls a user function.
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void TimerA0CaptureInit(void (*task)(uint16_t time)) {
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capture_task = task;
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P7->SEL0 |= 0x08;
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P7->SEL1 &= ~0x08; // configure P7.3 as TA0CCP0
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P7->DIR &= ~0x08;
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TIMER_A0->CTL &= ~0x30; // halt Timer A0
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TIMER_A0->CTL = 0x200; // SMCLK
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TIMER_A0->CCTL[0] = 0x4910; // capture on rising edge, synchronous capture, capture mode, interrupt enabled
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TIMER_A0->EX0 &= ~0x7; // input clock divider /1
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NVIC->IP[2] = (NVIC->IP[2] & 0xFFFFFF00) | 0x00000002; // priority 2
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// interrupts enabled in the main program after all devices initialized
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NVIC->ISER[0] = 0x100; // enable interrupt 8 in NVIC
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TIMER_A0->CTL |= 0x24; // reset and start Timer A0 in continuous up mode
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}
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void TA0_0_IRQHandler(void) {
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TIMER_A0->CCTL[0] &= ~0x1; // acknowledge capture/compare interrupt
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capture_task(TIMER_A0->CCR[0]); // execute user task
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}
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// Left Encoder A connected to P10.5 (J5)
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// Right Encoder A connected to P10.4 (J5)
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// user function, time is up-counting timer value when edge occurred in units of 0.083 usec
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// called when P10.4/.5 (TA3CCP0/1) edge occurs
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void (*capture_task0)(uint16_t time);
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void (*capture_task1)(uint16_t time);
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// Initialize Timer A3 in edge time mode to request interrupts on
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// the rising edges of P10.4 (TA3CCP0) and P10.5 (TA3CCP1).
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// Interrupt service routines acknowledge the interrupt and call a user function.
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// Assumes: low-speed subsystem master clock is 12 MHz
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void TimerA3CaptureInit(void (*task0)(uint16_t time),
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void (*task1)(uint16_t time)) {
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capture_task0 = task0;
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capture_task1 = task1;
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P10->SEL0 |= 0x30; // Set SEL0 for bits 4 and 5
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P10->SEL1 &= ~0x30; // Clear SEL1 for bits 4 and 5
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P10->DIR &= ~0x30; // Set as inputs
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TIMER_A3->CTL &= ~0x30; // halt Timer A3
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TIMER_A3->CTL = 0x200; // SMCLK
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TIMER_A3->CCTL[0] = 0x4910; // rising, sync, capture, interrupt
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TIMER_A3->CCTL[1] = 0x4910;
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TIMER_A3->EX0 &= ~0x7; // input clock divider /1
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NVIC->IP[3] = (NVIC->IP[3] & 0xFF0000FF) | 0x00020300; // priority 2 and 3
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NVIC->ISER[0] = (1 << 14) | (1 << 15); // enable 14 and 15
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// Start Timer A3 in continuous mode with clear
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TIMER_A3->CTL |= 0x0024; // TACLR | MC__CONTINUOUS
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}
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// The rising edge of P10.4 will cause an interrupt
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void TA3_0_IRQHandler(void) {
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TIMER_A3->CCTL[0] &= ~0x0001; // ack
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capture_task0(TIMER_A3->CCR[0]);
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}
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// The rising edge of P10.5 will cause an interrupt
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void TA3_N_IRQHandler(void) {
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TIMER_A3->CCTL[1] &= ~0x0001; // ack
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capture_task1(TIMER_A3->CCR[1]);
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} |